Computer Organizations- Question Paper- 5

 Computer Organizations- Question Paper- 5

 

Intel 8085 Microprocessor – Question Bank

 

Topics: Introduction, ALU, Timing & Control Unit, Register Set

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Part A — 50 MCQs (with Answers)

1. Intel 8085 is a ______ microprocessor.
Answer: 8-bit

2. Intel 8085 was introduced by
A. Intel
B. AMD
C. IBM
D. Motorola
Answer: A

3. The data bus width of 8085 is
A. 4-bit
B. 8-bit
C. 16-bit
D. 32-bit
Answer: B

4. Address bus width of 8085 is
A. 8-bit
B. 12-bit
C. 16-bit
D. 20-bit
Answer: C

5. 8085 can address up to
A. 32 KB
B. 64 KB
C. 1 MB
D. 4 GB
Answer: B

6. The ALU performs
A. Input operations
B. Arithmetic and logic operations
C. Memory storage
D. Display operations
Answer: B

7. Which register is directly connected to ALU?
A. Accumulator
B. Stack Pointer
C. Program Counter
D. Instruction Register
Answer: A

8. Accumulator is an ______ register.
A. 4-bit
B. 8-bit
C. 16-bit
D. 32-bit
Answer: B

9. Which of the following is NOT a general purpose register?
A. B
B. C
C. D
D. PC
Answer: D

10. Number of general purpose registers in 8085 is
A. 4
B. 6
C. 8
D. 10
Answer: B

11. Register pairs in 8085 are
A. BC, DE, HL
B. AB, CD, EF
C. XY, YZ
D. None
Answer: A

12. HL pair is commonly used as
A. Data register
B. Memory pointer
C. I/O port
D. Flag register
Answer: B

13. Program Counter is
A. 8-bit
B. 16-bit
C. 32-bit
D. 4-bit
Answer: B

14. Stack Pointer is
A. 8-bit
B. 12-bit
C. 16-bit
D. 20-bit
Answer: C

15. Flag register contains
A. 3 flags
B. 5 flags
C. 8 flags
D. 16 flags
Answer: B

16. Zero flag is set when
A. Result is zero
B. Result is negative
C. Result is positive
D. Overflow occurs
Answer: A

17. Carry flag indicates
A. Borrow or carry
B. Zero result
C. Even parity
D. Sign
Answer: A

18. Sign flag reflects
A. MSB of result
B. LSB of result
C. Carry
D. Parity
Answer: A

19. Parity flag is set when result has
A. Odd bits
B. Even number of 1s
C. Carry
D. Zero
Answer: B

20. Auxiliary carry is used in
A. Floating math
B. BCD arithmetic
C. Logic ops
D. Jump ops
Answer: B

21. Timing and Control Unit generates
A. Control signals
B. Data signals
C. Audio signals
D. Display signals
Answer: A

22. ALE stands for
A. Address Latch Enable
B. Arithmetic Logic Enable
C. Address Logic Execute
D. None
Answer: A

23. IO/M signal indicates
A. Memory or I/O operation
B. Interrupt
C. Reset
D. Halt
Answer: A

24. RD signal means
A. Read operation
B. Ready
C. Reset Data
D. Run Data
Answer: A

25. WR signal means
A. Write operation
B. Wait Ready
C. Word Reset
D. Work Ready
Answer: A

26. Clock frequency of 8085 is approximately
A. 1 MHz
B. 3 MHz
C. 10 MHz
D. 100 MHz
Answer: B

27. Instruction register stores
A. Current instruction
B. Address
C. Data
D. Flags
Answer: A

28. Temporary register is used by
A. ALU internally
B. User
C. Memory
D. I/O
Answer: A

29. 8085 is a
A. CISC processor
B. RISC processor
C. GPU
D. DSP
Answer: A

30. Accumulator is also called
A. A register
B. B register
C. C register
D. Flag register
Answer: A

31. Which unit controls execution sequence?
A. ALU
B. Control unit
C. Memory
D. Register
Answer: B

32. Data bus is
A. Bidirectional
B. Unidirectional
C. Fixed
D. None
Answer: A

33. Address bus is
A. Bidirectional
B. Unidirectional
C. Circular
D. None
Answer: B

34. Which is not a flag?
A. Zero
B. Carry
C. Overflow
D. Parity
Answer: C

35. Register B is
A. 8-bit
B. 16-bit
C. 32-bit
D. 4-bit
Answer: A

36. BC pair size is
A. 8-bit
B. 16-bit
C. 24-bit
D. 32-bit
Answer: B

37. DE pair size is
A. 16-bit
B. 8-bit
C. 4-bit
D. 32-bit
Answer: A

38. HL pair size is
A. 8-bit
B. 16-bit
C. 12-bit
D. 20-bit
Answer: B

39. Stack Pointer points to
A. Top of stack
B. Bottom of memory
C. ALU
D. I/O port
Answer: A

40. Program Counter points to
A. Next instruction
B. Current data
C. Flags
D. Stack
Answer: A

41. Control unit is responsible for
A. Decoding instruction
B. Printing
C. Display
D. Storage
Answer: A

42. 8085 uses ______ architecture.
A. Von Neumann
B. Harvard
C. Parallel
D. Neural
Answer: A

43. Temporary register is accessible by
A. Programmer
B. ALU only
C. Memory only
D. I/O only
Answer: B

44. Accumulator is part of
A. ALU section
B. Memory
C. I/O
D. Stack
Answer: A

45. Control signals are generated by
A. Timing & Control Unit
B. ALU
C. Register
D. Stack
Answer: A

46. Flag register size is
A. 4-bit
B. 8-bit
C. 16-bit
D. 32-bit
Answer: B

47. Instruction decoding is done by
A. Control unit
B. Register B
C. Stack
D. Memory
Answer: A

48. Arithmetic operations are done in
A. ALU
B. PC
C. SP
D. Control bus
Answer: A

49. Logical operations are done in
A. ALU
B. Memory
C. Stack
D. I/O
Answer: A

50. Microprocessor brain is
A. ALU + Control Unit
B. Memory
C. Keyboard
D. Monitor
Answer: A

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Part B —Fill in the Blanks (with Answers)

1. Intel 8085 is an 8-bit microprocessor.
2. 8085 has 16-bit address bus.
3. Maximum memory addressed is 64 KB.
4. Accumulator is an 8-bit register.
5. General purpose registers are B, C, D, E, H, L.
6. Register pairs are BC, DE, HL.
7. Program Counter size is 16-bit.
8. Stack Pointer size is 16-bit.
9. ALU stands for Arithmetic Logic Unit.
10. Control signals are generated by Timing and Control Unit.
11. Zero flag is set when result is zero.
12. Carry flag indicates carry/borrow.
13. Sign flag reflects MSB of result.
14. Parity flag checks even parity.
15. Auxiliary carry is used in BCD arithmetic.
16. Data bus is bidirectional.
17. Address bus is unidirectional.
18. ALE stands for Address Latch Enable.
19. RD indicates read operation.
20. WR indicates write operation.
21. HL pair acts as memory pointer.
22. Instruction register holds current instruction.
23. Temporary register is used by ALU.
24. 8085 is a CISC processor.
25. Accumulator is also called A register.
26. Control unit decodes instructions.
27. Stack Pointer points to top of stack.
28. Program Counter points to next instruction.
29. Register B is 8-bit.
30. BC pair is 16-bit.
31. Flag register contains 5 flags.
32. Flags are affected by ALU operations.
33. IO/M signal selects I/O or memory.
34. Microprocessor works on clock signal.
35. 8085 clock is about 3 MHz.
36. Accumulator stores intermediate results.
37. Control unit controls sequence of operations.
38. ALU performs arithmetic and logic operations.
39. Register set is inside CPU.
40. DE is a register pair.
41. HL register can hold address.
42. Carry flag is set on overflow from MSB.
43. Parity flag checks number of 1s.
44. Sign flag shows sign of result.
45. Zero flag clears when result is non-zero.
46. Instruction execution is controlled by control unit.
47. Data operations occur in ALU.
48. Address is stored in PC.
49. Stack is stored in memory.
50. Microprocessor is a programmable device.

============================================================

 

TOPICS:-  Intel 8085 Microprocessor – Data Bus, Address Bus, Addressing Modes.

 

Part A —MCQs (with Answers)

1. Intel 8085 is a
A) 4-bit
B) 8-bit
C) 16-bit
D) 32-bit
Answer: B

2. Width of data bus in 8085 is
A) 4-bit
B) 8-bit
C) 16-bit
D) 32-bit
Answer: B

3. Width of address bus in 8085 is
A) 8-bit
B) 12-bit
C) 16-bit
D) 20-bit
Answer: C

4. 8085 can address memory up to
A) 32 KB
B) 64 KB
C) 128 KB
D) 1 MB
Answer: B

5. Total address lines in 8085 are
A) 8
B) 12
C) 16
D) 20
Answer: C

6. Data bus in 8085 is
A) Unidirectional
B) Bidirectional
C) Input only
D) Output only
Answer: B

7. Address bus is
A) Bidirectional
B) Unidirectional
C) Both
D) None
Answer: B

8. Lines AD0–AD7 are
A) Only data lines
B) Only address lines
C) Multiplexed lines
D) Control lines
Answer: C

9. AD0–AD7 carry
A) Higher address
B) Lower address/data
C) Control signals
D) Interrupts
Answer: B

10. Higher order address lines are
A) A0–A7
B) A8–A15
C) AD0–AD7
D) None
Answer: B

11. Demultiplexing is done using
A) Decoder
B) Encoder
C) Latch
D) Register
Answer: C

12. ALE stands for
A) Address Line Enable
B) Address Latch Enable
C) Address Load Enable
D) Address Logic Enable
Answer: B

13. ALE signal is used to
A) Reset CPU
B) Latch lower address
C) Enable memory
D) Disable IO
Answer: B

14. Immediate addressing mode means
A) Data in register
B) Data in memory
C) Data in instruction
D) Data in IO
Answer: C

15. Example of immediate addressing
A) MOV A,B
B) MVI A,32H
C) ADD B
D) MOV A,M
Answer: B

16. Register addressing uses
A) Memory
B) Register
C) Stack
D) Port
Answer: B

17. Example of register addressing
A) ADD B
B) LDA 2000H
C) STA 3000H
D) JMP 2050H
Answer: A

18. Direct addressing uses
A) Register
B) Immediate data
C) Memory address
D) Stack
Answer: C

19. Example of direct addressing
A) LDA 2050H
B) ADD B
C) MOV A,B
D) CMA
Answer: A

20. Register indirect addressing uses
A) HL pair
B) BC only
C) DE only
D) SP only
Answer: A

21. Example of register indirect
A) MOV A,M
B) MVI A,10H
C) ADD B
D) STA 2000H
Answer: A

22. Implied addressing means operand is
A) Given
B) Not required
C) In memory
D) In IO
Answer: B

23. Example of implied instruction
A) CMA
B) MOV A,B
C) LDA 2000H
D) ADD B
Answer: A

24. Instruction MOV A,B uses
A) Immediate
B) Direct
C) Register
D) Indirect
Answer: C

25. Instruction MOV A,M uses
A) Register indirect
B) Immediate
C) Direct
D) Implied
Answer: A

26. Address bus carries
A) Data
B) Address
C) Opcode
D) Flags
Answer: B

27. Data bus carries
A) Only data
B) Only address
C) Data & opcode
D) Control signals
Answer: C

28. Maximum memory locations in 8085
A) 65536
B) 64000
C) 32000
D) 10000
Answer: A

29. Number of lower address lines multiplexed with data
A) 4
B) 8
C) 16
D) 2
Answer: B

30. A15–A8 lines are
A) Multiplexed
B) Dedicated address
C) Data lines
D) IO lines
Answer: B

31. Opcode is transferred through
A) Address bus
B) Data bus
C) Control bus
D) Stack
Answer: B

32. Instruction length in immediate mode is usually
A) 1 byte
B) 2 byte
C) 3 byte
D) 4 byte
Answer: B

33. LDA instruction uses
A) Immediate
B) Direct
C) Register
D) Implied
Answer: B

34. ADD M uses
A) Immediate
B) Register
C) Register indirect
D) Direct
Answer: C

35. Which is 3-byte instruction
A) CMA
B) MOV
C) LDA
D) ADD
Answer: C

36. Addressing mode defines
A) Data size
B) Operand location
C) Clock speed
D) Flags
Answer: B

37. MOV B,C uses
A) Direct
B) Immediate
C) Register
D) Indirect
Answer: C

38. MVI instruction uses
A) Immediate
B) Register
C) Direct
D) Implied
Answer: A

39. STA instruction stores
A) Register to register
B) Accumulator to memory
C) Memory to register
D) IO to register
Answer: B

40. Direct addressing needs
A) 8-bit address
B) 16-bit address
C) No address
D) 4-bit address
Answer: B

41. Number of addressing modes in 8085 (basic)
A) 3
B) 4
C) 5
D) 7
Answer: C

42. HL pair is mainly used for
A) Immediate
B) Indirect addressing
C) Direct addressing
D) IO addressing
Answer: B

43. Opcode fetch uses
A) Address bus only
B) Data bus only
C) Both
D) None
Answer: C

44. Lower address appears on bus when
A) ALE high
B) ALE low
C) RESET
D) HOLD
Answer: A

45. Which is implied instruction
A) RRC
B) MOV
C) MVI
D) LDA
Answer: A

46. MOV M,A uses
A) Register indirect
B) Immediate
C) Direct
D) Register
Answer: A

47. Instruction containing operand inside instruction is
A) Direct
B) Immediate
C) Register
D) Implied
Answer: B

48. Data bus size determines
A) Memory size
B) Word size
C) Speed only
D) Ports
Answer: B

49. Address bus size determines
A) Speed
B) Memory capacity
C) Registers
D) Flags
Answer: B

50. Intel 8085 uses multiplexed lines to
A) Increase speed
B) Reduce pin count
C) Increase memory
D) Reduce power
Answer: B

-------------------------------------------------------------------

Part B — 50 Fill in the Blanks (with Answers)

1. 8085 is a ______ bit microprocessor.
Answer: 8

2. Data bus width is ______ bits.
Answer: 8

3. Address bus width is ______ bits.
Answer: 16

4. Maximum addressable memory is ______ KB.
Answer: 64

5. Address bus is ______ direction.
Answer: Unidirectional

6. Data bus is ______ direction.
Answer: Bidirectional

7. AD0–AD7 are ______ lines.
Answer: Multiplexed

8. ALE stands for Address ______ Enable.
Answer: Latch

9. A8–A15 carry ______ address.
Answer: Higher

10. AD0–AD7 carry ______ address.
Answer: Lower

11. Immediate mode data is part of ______.
Answer: Instruction

12. MOV A,B is ______ addressing.
Answer: Register

13. MVI A,32H is ______ addressing.
Answer: Immediate

14. LDA 2000H is ______ addressing.
Answer: Direct

15. MOV A,M is ______ addressing.
Answer: Register indirect

16. CMA is ______ addressing.
Answer: Implied

17. HL pair is used in ______ addressing.
Answer: Indirect

18. Direct addressing gives ______ bit address.
Answer: 16

19. Data and opcode travel through ______ bus.
Answer: Data

20. Memory address travels through ______ bus.
Answer: Address

21. ALE signal is used for ______.
Answer: Demultiplexing

22. 8085 has ______ address lines.
Answer: 16

23. 8085 has ______ data lines.
Answer: 8

24. Opcode is fetched from ______.
Answer: Memory

25. MOV M,A stores data from ______ to memory.
Answer: Accumulator

26. STA stores accumulator into ______.
Answer: Memory

27. Immediate instruction length is usually ______ bytes.
Answer: 2

28. Direct instruction length is usually ______ bytes.
Answer: 3

29. Register instructions are usually ______ byte.
Answer: 1

30. Addressing mode specifies operand ______.
Answer: Location

31. Lower address/data are separated using ______.
Answer: Latch

32. ALE goes ______ to latch address.
Answer: High

33. MOV B,C transfers data between ______.
Answer: Registers

34. ADD M adds memory to ______.
Answer: Accumulator

35. Register indirect uses register pair ______.
Answer: HL

36. Memory capacity depends on ______ bus width.
Answer: Address

37. Word size depends on ______ bus width.
Answer: Data

38. Multiplexing reduces ______ count.
Answer: Pin

39. Operand is implied in ______ addressing.
Answer: Implied

40. Instruction with embedded data is ______ mode.
Answer: Immediate

41. LDA loads accumulator from ______.
Answer: Memory

42. ADD B uses ______ addressing.
Answer: Register

43. Opcode travels via ______ bus.
Answer: Data

44. A15 is ______ order address bit.
Answer: Highest

45. AD0 is ______ order multiplexed line.
Answer: Lowest

46. Register mode is fastest because no ______ access needed.
Answer: Memory

47. Direct mode needs full ______ address.
Answer: Memory

48. Implied instructions have ______ operand.
Answer: No

49. MOV instruction does not affect ______ flags.
Answer: Status

50. 8085 addressing modes are ______ in number (basic).
Answer: Five

=================================================================

 

TOPICS:-  Intel 8085 Microprocessor – Data Bus, Address Bus, Addressing Modes.

Part A —MCQs (with Answers)

1. Intel 8085 is a
A) 4-bit
B) 8-bit
C) 16-bit
D) 32-bit
Answer: B

2. Width of data bus in 8085 is
A) 4-bit
B) 8-bit
C) 16-bit
D) 32-bit
Answer: B

3. Width of address bus in 8085 is
A) 8-bit
B) 12-bit
C) 16-bit
D) 20-bit
Answer: C

4. 8085 can address memory up to
A) 32 KB
B) 64 KB
C) 128 KB
D) 1 MB
Answer: B

5. Total address lines in 8085 are
A) 8
B) 12
C) 16
D) 20
Answer: C

6. Data bus in 8085 is
A) Unidirectional
B) Bidirectional
C) Input only
D) Output only
Answer: B

7. Address bus is
A) Bidirectional
B) Unidirectional
C) Both
D) None
Answer: B

8. Lines AD0–AD7 are
A) Only data lines
B) Only address lines
C) Multiplexed lines
D) Control lines
Answer: C

9. AD0–AD7 carry
A) Higher address
B) Lower address/data
C) Control signals
D) Interrupts
Answer: B

10. Higher order address lines are
A) A0–A7
B) A8–A15
C) AD0–AD7
D) None
Answer: B

11. Demultiplexing is done using
A) Decoder
B) Encoder
C) Latch
D) Register
Answer: C

12. ALE stands for
A) Address Line Enable
B) Address Latch Enable
C) Address Load Enable
D) Address Logic Enable
Answer: B

13. ALE signal is used to
A) Reset CPU
B) Latch lower address
C) Enable memory
D) Disable IO
Answer: B

14. Immediate addressing mode means
A) Data in register
B) Data in memory
C) Data in instruction
D) Data in IO
Answer: C

15. Example of immediate addressing
A) MOV A,B
B) MVI A,32H
C) ADD B
D) MOV A,M
Answer: B

16. Register addressing uses
A) Memory
B) Register
C) Stack
D) Port
Answer: B

17. Example of register addressing
A) ADD B
B) LDA 2000H
C) STA 3000H
D) JMP 2050H
Answer: A

18. Direct addressing uses
A) Register
B) Immediate data
C) Memory address
D) Stack
Answer: C

19. Example of direct addressing
A) LDA 2050H
B) ADD B
C) MOV A,B
D) CMA
Answer: A

20. Register indirect addressing uses
A) HL pair
B) BC only
C) DE only
D) SP only
Answer: A

21. Example of register indirect
A) MOV A,M
B) MVI A,10H
C) ADD B
D) STA 2000H
Answer: A

22. Implied addressing means operand is
A) Given
B) Not required
C) In memory
D) In IO
Answer: B

23. Example of implied instruction
A) CMA
B) MOV A,B
C) LDA 2000H
D) ADD B
Answer: A

24. Instruction MOV A,B uses
A) Immediate
B) Direct
C) Register
D) Indirect
Answer: C

25. Instruction MOV A,M uses
A) Register indirect
B) Immediate
C) Direct
D) Implied
Answer: A

26. Address bus carries
A) Data
B) Address
C) Opcode
D) Flags
Answer: B

27. Data bus carries
A) Only data
B) Only address
C) Data & opcode
D) Control signals
Answer: C

28. Maximum memory locations in 8085
A) 65536
B) 64000
C) 32000
D) 10000
Answer: A

29. Number of lower address lines multiplexed with data
A) 4
B) 8
C) 16
D) 2
Answer: B

30. A15–A8 lines are
A) Multiplexed
B) Dedicated address
C) Data lines
D) IO lines
Answer: B

31. Opcode is transferred through
A) Address bus
B) Data bus
C) Control bus
D) Stack
Answer: B

32. Instruction length in immediate mode is usually
A) 1 byte
B) 2 byte
C) 3 byte
D) 4 byte
Answer: B

33. LDA instruction uses
A) Immediate
B) Direct
C) Register
D) Implied
Answer: B

34. ADD M uses
A) Immediate
B) Register
C) Register indirect
D) Direct
Answer: C

35. Which is 3-byte instruction
A) CMA
B) MOV
C) LDA
D) ADD
Answer: C

36. Addressing mode defines
A) Data size
B) Operand location
C) Clock speed
D) Flags
Answer: B

37. MOV B,C uses
A) Direct
B) Immediate
C) Register
D) Indirect
Answer: C

38. MVI instruction uses
A) Immediate
B) Register
C) Direct
D) Implied
Answer: A

39. STA instruction stores
A) Register to register
B) Accumulator to memory
C) Memory to register
D) IO to register
Answer: B

40. Direct addressing needs
A) 8-bit address
B) 16-bit address
C) No address
D) 4-bit address
Answer: B

41. Number of addressing modes in 8085 (basic)
A) 3
B) 4
C) 5
D) 7
Answer: C

42. HL pair is mainly used for
A) Immediate
B) Indirect addressing
C) Direct addressing
D) IO addressing
Answer: B

43. Opcode fetch uses
A) Address bus only
B) Data bus only
C) Both
D) None
Answer: C

44. Lower address appears on bus when
A) ALE high
B) ALE low
C) RESET
D) HOLD
Answer: A

45. Which is implied instruction
A) RRC
B) MOV
C) MVI
D) LDA
Answer: A

46. MOV M,A uses
A) Register indirect
B) Immediate
C) Direct
D) Register
Answer: A

47. Instruction containing operand inside instruction is
A) Direct
B) Immediate
C) Register
D) Implied
Answer: B

48. Data bus size determines
A) Memory size
B) Word size
C) Speed only
D) Ports
Answer: B

49. Address bus size determines
A) Speed
B) Memory capacity
C) Registers
D) Flags
Answer: B

50. Intel 8085 uses multiplexed lines to
A) Increase speed
B) Reduce pin count
C) Increase memory
D) Reduce power
Answer: B

--------------------------------------------------------------------

Part B —Fill in the Blanks (with Answers)

1. 8085 is a ______ bit microprocessor.
Answer: 8

2. Data bus width is ______ bits.
Answer: 8

3. Address bus width is ______ bits.
Answer: 16

4. Maximum addressable memory is ______ KB.
Answer: 64

5. Address bus is ______ direction.
Answer: Unidirectional

6. Data bus is ______ direction.
Answer: Bidirectional

7. AD0–AD7 are ______ lines.
Answer: Multiplexed

8. ALE stands for Address ______ Enable.
Answer: Latch

9. A8–A15 carry ______ address.
Answer: Higher

10. AD0–AD7 carry ______ address.
Answer: Lower

11. Immediate mode data is part of ______.
Answer: Instruction

12. MOV A,B is ______ addressing.
Answer: Register

13. MVI A,32H is ______ addressing.
Answer: Immediate

14. LDA 2000H is ______ addressing.
Answer: Direct

15. MOV A,M is ______ addressing.
Answer: Register indirect

16. CMA is ______ addressing.
Answer: Implied

17. HL pair is used in ______ addressing.
Answer: Indirect

18. Direct addressing gives ______ bit address.
Answer: 16

19. Data and opcode travel through ______ bus.
Answer: Data

20. Memory address travels through ______ bus.
Answer: Address

21. ALE signal is used for ______.
Answer: Demultiplexing

22. 8085 has ______ address lines.
Answer: 16

23. 8085 has ______ data lines.
Answer: 8

24. Opcode is fetched from ______.
Answer: Memory

25. MOV M,A stores data from ______ to memory.
Answer: Accumulator

26. STA stores accumulator into ______.
Answer: Memory

27. Immediate instruction length is usually ______ bytes.
Answer: 2

28. Direct instruction length is usually ______ bytes.
Answer: 3

29. Register instructions are usually ______ byte.
Answer: 1

30. Addressing mode specifies operand ______.
Answer: Location

31. Lower address/data are separated using ______.
Answer: Latch

32. ALE goes ______ to latch address.
Answer: High

33. MOV B,C transfers data between ______.
Answer: Registers

34. ADD M adds memory to ______.
Answer: Accumulator

35. Register indirect uses register pair ______.
Answer: HL

36. Memory capacity depends on ______ bus width.
Answer: Address

37. Word size depends on ______ bus width.
Answer: Data

38. Multiplexing reduces ______ count.
Answer: Pin

39. Operand is implied in ______ addressing.
Answer: Implied

40. Instruction with embedded data is ______ mode.
Answer: Immediate

41. LDA loads accumulator from ______.
Answer: Memory

42. ADD B uses ______ addressing.
Answer: Register

43. Opcode travels via ______ bus.
Answer: Data

44. A15 is ______ order address bit.
Answer: Highest

45. AD0 is ______ order multiplexed line.
Answer: Lowest

46. Register mode is fastest because no ______ access needed.
Answer: Memory

47. Direct mode needs full ______ address.
Answer: Memory

48. Implied instructions have ______ operand.
Answer: No

49. MOV instruction does not affect ______ flags.
Answer: Status

50. 8085 addressing modes are ______ in number (basic).
Answer: Five

==========================================================

Topic: Intel 8085 Microprocessor – Complete Instruction Set & Instruction Format

---

Part A —MCQs (with Answers)

1. 8085 is an ______ bit microprocessor.
A) 4
B) 8
C) 16
D) 32
✅ Answer: B

2. Total number of instructions in 8085 instruction set is approximately:
A) 54
B) 74
C) 100
D) 256
✅ Answer: B

3. The number of instruction formats in 8085 is:
A) 1
B) 2
C) 3
D) 4
✅ Answer: C

4. One-byte instruction contains:
A) Opcode only
B) Opcode + data
C) Address only
D) Two opcodes
✅ Answer: A

5. Two-byte instruction contains:
A) Opcode + 8-bit data
B) Opcode + 16-bit data
C) Only address
D) Two opcodes
✅ Answer: A

6. Three-byte instruction contains:
A) Opcode + 8-bit address
B) Opcode + 16-bit address/data
C) Only opcode
D) Two opcodes + data
✅ Answer: B

7. MOV instruction belongs to:
A) Data transfer group
B) Arithmetic group
C) Logical group
D) Branch group
✅ Answer: A

8. ADD instruction belongs to:
A) Logical
B) Arithmetic
C) Branch
D) Machine control
✅ Answer: B

9. ANA instruction performs:
A) OR
B) XOR
C) AND
D) NOT
✅ Answer: C

10. JMP instruction belongs to:
A) Data transfer
B) Arithmetic
C) Branching
D) Stack
✅ Answer: C

---

11. HLT instruction is of type:
A) Machine control
B) Logical
C) Arithmetic
D) Branch
✅ Answer: A

12. Instruction that exchanges HL with DE:
A) XCHG
B) XTHL
C) SPHL
D) PCHL
✅ Answer: A

13. LXI instruction is:
A) 1 byte
B) 2 byte
C) 3 byte
D) 4 byte
✅ Answer: C

14. MVI instruction is:
A) 1 byte
B) 2 byte
C) 3 byte
D) 4 byte
✅ Answer: B

15. STA instruction uses:
A) Register addressing
B) Immediate addressing
C) Direct addressing
D) Implied addressing
✅ Answer: C

16. INR instruction affects:
A) Carry flag
B) All flags
C) All except carry
D) No flags
✅ Answer: C

17. DCR instruction:
A) Increments register
B) Decrements register
C) Clears register
D) Complements register
✅ Answer: B

18. Instruction to rotate accumulator left:
A) RLC
B) RRC
C) RAL
D) RAR
✅ Answer: A

19. Compare instruction is:
A) CMP
B) CPA
C) COM
D) CPY
✅ Answer: A

20. Instruction used to call subroutine:
A) CALL
B) JUMP
C) RET
D) PUSH
✅ Answer: A

---

21. RET instruction is used to:
A) Stop program
B) Return from subroutine
C) Reset CPU
D) Restart
✅ Answer: B

22. PUSH instruction works with:
A) Stack
B) Register A
C) Flags only
D) PC
✅ Answer: A

23. POP instruction:
A) Writes to memory
B) Reads from stack
C) Clears stack
D) Jumps
✅ Answer: B

24. Instruction to enable interrupts:
A) EI
B) DI
C) SIM
D) RIM
✅ Answer: A

25. Disable interrupts instruction:
A) EI
B) DI
C) SIM
D) RIM
✅ Answer: B

26. Decimal adjust instruction is:
A) DAA
B) DAS
C) DAD
D) DAI
✅ Answer: A

27. DAD instruction performs:
A) 8-bit add
B) 16-bit add
C) Subtract
D) Compare
✅ Answer: B

28. Which is a logical instruction?
A) ORA
B) ADD
C) INR
D) MOV
✅ Answer: A

29. Which is branching instruction?
A) JZ
B) ANA
C) ADD
D) MOV
✅ Answer: A

30. PCHL instruction loads PC from:
A) DE
B) BC
C) HL
D) SP
✅ Answer: C

---

31. XRA instruction performs:
A) AND
B) OR
C) XOR
D) NOT
✅ Answer: C

32. CMA instruction:
A) Clears accumulator
B) Complements accumulator
C) Adds accumulator
D) Subtracts accumulator
✅ Answer: B

33. STC instruction:
A) Clears carry
B) Sets carry
C) Toggles carry
D) No effect
✅ Answer: B

34. CMC instruction:
A) Set carry
B) Complement carry
C) Clear carry
D) Rotate carry
✅ Answer: B

35. IN instruction is used for:
A) Memory input
B) I/O input
C) Arithmetic
D) Branch
✅ Answer: B

36. OUT instruction sends data to:
A) Memory
B) I/O port
C) Register
D) Stack
✅ Answer: B

37. Number of flags in 8085:
A) 3
B) 4
C) 5
D) 6
✅ Answer: C

38. Flag not affected by INR:
A) Z
B) S
C) CY
D) P
✅ Answer: C

39. RST instruction is:
A) Arithmetic
B) Restart/branch
C) Logical
D) Stack
✅ Answer: B

40. RIM instruction is used to:
A) Read interrupt mask
B) Reset interrupt
C) Read memory
D) Read register
✅ Answer: A

---

41. SIM instruction is used to:
A) Set interrupt mask
B) Shift accumulator
C) Store interrupt
D) Stop interrupt
✅ Answer: A

42. SPHL instruction copies HL into:
A) PC
B) SP
C) DE
D) BC
✅ Answer: B

43. XTHL exchanges HL with:
A) BC
B) DE
C) Stack top
D) PC
✅ Answer: C

44. Instruction format depends on:
A) Data size
B) Opcode + operand bytes
C) Register
D) Flag
✅ Answer: B

45. Opcode size in 8085 is:
A) 4-bit
B) 6-bit
C) 8-bit
D) 16-bit
✅ Answer: C

46. Immediate instructions contain:
A) Data in instruction
B) Address only
C) No operand
D) Register only
✅ Answer: A

47. Direct addressing uses:
A) Register
B) Immediate data
C) Memory address
D) Stack
✅ Answer: C

48. MOV A,B is:
A) 2-byte
B) 3-byte
C) 1-byte
D) 4-byte
✅ Answer: C

49. LDA is:
A) Immediate
B) Direct
C) Register
D) Implied
✅ Answer: B

50. Instruction groups in 8085 are:
A) 3
B) 4
C) 5
D) 6
✅ Answer: C

---

 Part B — 50 Fill in the Blanks (with Answers)

1. 8085 is a ______ bit microprocessor.
Answer: 8

2. 8085 has ______ instruction formats.
Answer: 3

3. One-byte instruction contains only ______.
Answer: opcode

4. Two-byte instruction contains opcode and ______ data.
Answer: 8-bit

5. Three-byte instruction contains opcode and ______ address.
Answer: 16-bit

6. MOV is a ______ transfer instruction.
Answer: data

7. ADD belongs to ______ group.
Answer: arithmetic

8. ANA performs logical ______.
Answer: AND

9. ORA performs logical ______.
Answer: OR

10. XRA performs logical ______.
Answer: XOR

11. JMP is a ______ instruction.
Answer: branching

12. CALL is used to call a ______.
Answer: subroutine

13. RET returns from ______.
Answer: subroutine

14. PUSH stores data into ______.
Answer: stack

15. POP reads data from ______.
Answer: stack

16. EI enables ______.
Answer: interrupts

17. DI disables ______.
Answer: interrupts

18. DAA is used for ______ adjustment.
Answer: decimal

19. INR increments ______ by one.
Answer: register/memory

20. DCR decrements ______ by one.
Answer: register/memory

21. CMA complements the ______.
Answer: accumulator

22. STC sets the ______ flag.
Answer: carry

23. CMC complements ______ flag.
Answer: carry

24. RLC rotates accumulator ______.
Answer: left

25. RRC rotates accumulator ______.
Answer: right

26. LXI loads register pair with ______ bit data.
Answer: 16

27. MVI loads register with ______ bit data.
Answer: 8

28. LDA uses ______ addressing.
Answer: direct

29. STA stores accumulator to ______.
Answer: memory

30. PCHL loads PC from ______ pair.
Answer: HL

31. SPHL copies HL to ______.
Answer: SP

32. XCHG exchanges HL with ______.
Answer: DE

33. DAD performs ______ bit addition.
Answer: 16

34. IN reads from ______ port.
Answer: input

35. OUT writes to ______ port.
Answer: output

36. Number of flags in 8085 is ______.
Answer: 5

37. Zero flag is set when result is ______.
Answer: zero

38. Sign flag reflects ______ of result.
Answer: sign/MSB

39. Parity flag shows ______ of bits.
Answer: parity

40. Carry flag indicates ______.
Answer: carry/borrow

41. Auxiliary carry is used in ______ arithmetic.
Answer: BCD

42. HLT instruction ______ the processor.
Answer: halts

43. NOP means ______ operation.
Answer: no

44. RIM reads ______ mask.
Answer: interrupt

45. SIM sets ______ mask.
Answer: interrupt

46. Immediate instructions contain ______ inside instruction.
Answer: data

47. Direct instructions contain memory ______.
Answer: address

48. Register instructions use ______ as operand.
Answer: register

49. Instruction set of 8085 is divided into ______ groups.
Answer: 5

50. Opcode length in 8085 is ______ bits.
Answer: 8

===============================================

 

Intel 8085 Microprocessor :- Opcode and Operand, Word Size, Instruction Cycle

---

Part A —MCQs (with Answers)

1. In 8085, an opcode represents:
A) Data
B) Address
C) Operation to be performed
D) Memory size
Answer: C

2. Operand in an instruction specifies:
A) Clock speed
B) Data or address
C) Processor type
D) Flag register
Answer: B

3. The word size of 8085 microprocessor is:
A) 4-bit
B) 8-bit
C) 16-bit
D) 32-bit
Answer: B

4. Opcode length in 8085 is usually:
A) 2 bits
B) 4 bits
C) 8 bits
D) 16 bits
Answer: C

5. The instruction cycle consists of:
A) Fetch and Execute
B) Decode only
C) Write only
D) Reset only
Answer: A

6. Which part of instruction tells the CPU what to do?
A) Operand
B) Opcode
C) Flag
D) Stack
Answer: B

7. MOV A,B — here A and B are:
A) Opcodes
B) Operands
C) Flags
D) Cycles
Answer: B

8. Number of bits processed at a time by 8085 is:
A) 4
B) 8
C) 12
D) 32
Answer: B

9. Opcode is stored in:
A) Instruction Register
B) Stack Pointer
C) Flag Register
D) Accumulator
Answer: A

10. Instruction cycle begins with:
A) Execute cycle
B) Fetch cycle
C) Reset cycle
D) Write cycle
Answer: B

11. An instruction without operand is called:
A) Zero-address instruction
B) Two-byte instruction
C) Three-byte instruction
D) Double word
Answer: A

12. Example of single byte instruction:
A) CMA
B) LDA 2000H
C) LXI H,2050H
D) STA 3000H
Answer: A

13. LDA instruction contains:
A) No operand
B) One operand
C) Two operands
D) Three operands
Answer: B

14. LXI instruction is:
A) 1-byte
B) 2-byte
C) 3-byte
D) 4-byte
Answer: C

15. Instruction cycle = Fetch cycle + ______
A) Decode cycle
B) Execute cycle
C) Write cycle
D) Halt cycle
Answer: B

16. Opcode is decoded by:
A) ALU
B) Control Unit
C) Register
D) Bus
Answer: B

17. Operand may be located in:
A) Register
B) Memory
C) Immediate data
D) All of these
Answer: D

18. Word length defines:
A) Memory size
B) Data width
C) Clock rate
D) Bus length
Answer: B

19. 8085 is called 8-bit processor because:
A) Address bus is 8-bit
B) Data bus is 8-bit
C) Control bus is 8-bit
D) Stack is 8-bit
Answer: B

20. Opcode + Operand together form:
A) Instruction
B) Program
C) Cycle
D) Register
Answer: A

21. Fetch cycle reads instruction from:
A) ALU
B) Memory
C) I/O
D) Register
Answer: B

22. During fetch cycle, instruction goes to:
A) Stack
B) IR
C) Flag
D) SP
Answer: B

23. PC stands for:
A) Program Counter
B) Process Cycle
C) Program Code
D) Primary Control
Answer: A

24. Program Counter holds:
A) Data
B) Address of next instruction
C) Opcode
D) Operand
Answer: B

25. Opcode is generally placed:
A) First byte
B) Last byte
C) Middle byte
D) Random
Answer: A

26. Instruction cycle repeats until:
A) Reset
B) Halt
C) Overflow
D) Decode
Answer: B

27. Immediate operand means data is:
A) In register
B) In memory
C) In instruction itself
D) In stack
Answer: C

28. MOV instruction size is:
A) 1 byte
B) 2 byte
C) 3 byte
D) 4 byte
Answer: A

29. STA instruction is:
A) 1-byte
B) 2-byte
C) 3-byte
D) No-byte
Answer: C

30. Execution cycle performs:
A) Instruction fetch
B) Instruction decode
C) Operation execution
D) Reset
Answer: C

31. Opcode is also called:
A) Operation code
B) Address code
C) Memory code
D) Data code
Answer: A

32. Operand may represent:
A) Data
B) Address
C) Register
D) All
Answer: D

33. Word size affects:
A) Processing speed
B) Data handling capacity
C) Accuracy
D) Only memory
Answer: B

34. Single byte instruction contains:
A) Only opcode
B) Only operand
C) Opcode + operand
D) Address only
Answer: A

35. Two-byte instruction contains:
A) Opcode only
B) Opcode + 8-bit data
C) Two operands
D) Address only
Answer: B

36. Three-byte instruction contains:
A) Opcode + 16-bit address
B) Opcode only
C) Data only
D) Flags
Answer: A

37. Instruction cycle is controlled by:
A) Control unit
B) ALU
C) Register B
D) Memory
Answer: A

38. Decode step identifies:
A) Data
B) Operation
C) Address
D) Flag
Answer: B

39. Example of zero operand instruction:
A) NOP
B) LDA
C) STA
D) LXI
Answer: A

40. Instruction register stores:
A) Current instruction
B) Next address
C) Data
D) Flags
Answer: A

41. Word size equals ALU size in:
A) Most processors
B) No processor
C) Only 8085
D) Only 16-bit CPU
Answer: A

42. Opcode is interpreted during:
A) Fetch
B) Decode
C) Execute
D) Halt
Answer: B

43. Operand is used during:
A) Execution
B) Reset
C) Halt
D) Idle
Answer: A

44. PC increments after:
A) Fetch
B) Reset
C) Halt
D) Interrupt
Answer: A

45. Instruction cycle is made of how many main parts?
A) 1
B) 2
C) 3
D) 4
Answer: B

46. 8085 processes data in units of:
A) Byte
B) Nibble
C) Word (32-bit)
D) Double word
Answer: A

47. Opcode determines:
A) Operation type
B) Memory size
C) Address bus
D) Stack size
Answer: A

48. Operand field may be absent in:
A) NOP
B) LXI
C) LDA
D) STA
Answer: A

49. Instruction execution ends with:
A) Result storage
B) Reset
C) Power off
D) Decode
Answer: A

50. Fetch-Decode-Execute is called:
A) Machine cycle
B) Instruction cycle
C) Clock cycle
D) Bus cycle
Answer: B

---

 

Part B —Fill in the Blanks (with Answers)

1. Opcode means ______ code.
Answer: operation

2. Operand specifies ______ or address.
Answer: data

3. Word size of 8085 is ______ bits.
Answer: 8

4. Instruction cycle starts with ______ cycle.
Answer: fetch

5. Instruction cycle ends with ______ cycle.
Answer: execute

6. Opcode + Operand forms an ______.
Answer: instruction

7. MOV A,B has two ______.
Answer: operands

8. Fetch cycle reads instruction from ______.
Answer: memory

9. Instruction is stored in ______ register.
Answer: instruction

10. PC stands for ______ Counter.
Answer: Program

11. PC holds address of ______ instruction.
Answer: next

12. Zero operand instruction example is ______.
Answer: NOP

13. Three byte instruction contains ______ bit address.
Answer: 16

14. Two byte instruction contains ______ bit data.
Answer: 8

15. Decode is done by ______ unit.
Answer: control

16. Operand may be in register or ______.
Answer: memory

17. 8085 is an ______ bit microprocessor.
Answer: 8

18. Opcode is decoded during ______ phase.
Answer: decode

19. Execution phase performs ______.
Answer: operation

20. Immediate operand is inside the ______.
Answer: instruction

21. Instruction cycle repeats until ______ instruction.
Answer: HALT

22. Single byte instruction contains only ______.
Answer: opcode

23. LXI is a ______ byte instruction.
Answer: three

24. STA uses ______ bit address.
Answer: 16

25. Word size equals ALU ______.
Answer: width

26. Opcode tells CPU what ______ to perform.
Answer: operation

27. Operand tells CPU where ______ is.
Answer: data

28. Fetch uses ______ bus to read instruction.
Answer: address

29. Data width of 8085 is ______ bits.
Answer: 8

30. Instruction register stores ______ instruction.
Answer: current

31. CMA is a ______ byte instruction.
Answer: one

32. LDA is a ______ byte instruction.
Answer: three

33. Instruction cycle = Fetch + ______.
Answer: execute

34. MOV is a ______ byte instruction.
Answer: one

35. Operand can be ______ value.
Answer: immediate

36. Word size defines processing ______.
Answer: capacity

37. Decode step identifies the ______.
Answer: opcode

38. Fetch step uses ______ counter.
Answer: program

39. Opcode is located in ______ byte usually.
Answer: first

40. Instruction without operand is called ______ instruction.
Answer: zero-address

41. Operand may be register or memory ______.
Answer: location

42. Execution gives ______.
Answer: result

43. Fetch increments the ______.
Answer: PC

44. Instruction is a binary ______.
Answer: pattern

45. Operation is performed by ______.
Answer: ALU

46. Control signals are generated by ______ unit.
Answer: control

47. Word size affects data ______.
Answer: width

48. Opcode is part of ______.
Answer: instruction

49. Execute phase uses ______.
Answer: operand

50. Fetch-Decode-Execute loop is called instruction ______.
Answer: cycle

 

================================================================

 

TOPICS:-  Intel 8085 Microprocessor – Pin Configuration

---

Part 1 —MCQs (Intel 8085 Pin Configuration)

1. Intel 8085 is a ______ microprocessor.
A. 4-bit
B. 8-bit
C. 16-bit
D. 32-bit
Answer: B

2. Intel 8085 has how many pins?
A. 20
B. 30
C. 40
D. 64
Answer: C

3. Pins AD0–AD7 are used for:
A. Data only
B. Address only
C. Multiplexed address/data
D. Control signals
Answer: C

4. Which signal is used to separate address and data on AD0–AD7?
A. RD
B. ALE
C. IO/M
D. READY
Answer: B

5. ALE stands for:
A. Address Latch Enable
B. Address Load Enable
C. Address Line Enable
D. Address Logic Enable
Answer: A

6. How many address lines are there in 8085?
A. 8
B. 12
C. 16
D. 20
Answer: C

7. A8–A15 are:
A. Data lines
B. Address lines
C. Control lines
D. Interrupt lines
Answer: B

8. RD pin is used to:
A. Write data
B. Reset CPU
C. Read data
D. Hold bus
Answer: C

9. WR signal is active when:
A. Low
B. High
C. Floating
D. Pulsed
Answer: A

10. IO/M pin indicates:
A. Interrupt type
B. Memory or I/O operation
C. Machine cycle
D. Bus control
Answer: B

---

11. READY pin is used to:
A. Reset CPU
B. Insert wait states
C. Enable DMA
D. Enable interrupts
Answer: B

12. HOLD signal is used for:
A. Reset
B. DMA request
C. Interrupt
D. Clock
Answer: B

13. HLDA stands for:
A. Hold Acknowledge
B. Halt Acknowledge
C. High Level Data Access
D. Hardware Logic Data Access
Answer: A

14. INTR is a:
A. Non-maskable interrupt
B. Maskable interrupt
C. DMA signal
D. Reset signal
Answer: B

15. Which is non-maskable interrupt?
A. INTR
B. RST 7.5
C. TRAP
D. RST 6.5
Answer: C

---

16. How many hardware interrupts are available in 8085?
A. 3
B. 4
C. 5
D. 6
Answer: C

17. SID pin is used for:
A. Serial input data
B. Serial output data
C. Interrupt
D. Reset
Answer: A

18. SOD pin is used for:
A. Serial output data
B. Serial input data
C. DMA
D. Reset
Answer: A

19. RESET IN pin is:
A. Active high
B. Active low
C. Bidirectional
D. Analog
Answer: A

20. RESET OUT signal is used to:
A. Reset peripherals
B. Reset clock
C. Reset memory
D. Reset address bus
Answer: A

---

21. CLK OUT pin provides:
A. Input clock
B. Output clock
C. Reset pulse
D. DMA signal
Answer: B

22. X1 and X2 pins are used for:
A. Interrupt
B. Crystal connection
C. Reset
D. DMA
Answer: B

23. Maximum memory addressing capability of 8085 is:
A. 32 KB
B. 64 KB
C. 128 KB
D. 1 MB
Answer: B

24. Status signals include:
A. RD, WR
B. IO/M, S1, S0
C. AD0–AD7
D. READY, HOLD
Answer: B

25. S1 and S0 indicate:
A. Data type
B. Machine cycle status
C. Interrupt type
D. Address type
Answer: B

---

26. Vcc for 8085 is:
A. +3V
B. +5V
C. +12V
D. +9V
Answer: B

27. Vss represents:
A. +5V
B. Ground
C. Clock
D. Reset
Answer: B

28. AD0–AD7 carry address during:
A. Entire cycle
B. First part of cycle
C. Last part only
D. Never
Answer: B

29. ALE signal is:
A. Active low
B. Active high
C. Bidirectional
D. Analog
Answer: B

30. Which pin is used for slow devices synchronization?
A. READY
B. HOLD
C. RESET
D. INTR
Answer: A

---

31. DMA controller requests bus using:
A. READY
B. HOLD
C. RD
D. WR
Answer: B

32. After HOLD request, CPU sends:
A. HLDA
B. READY
C. INTA
D. ALE
Answer: A

33. INTA stands for:
A. Interrupt Acknowledge
B. Internal Address
C. Interrupt Address
D. Input Acknowledge
Answer: A

34. INTA is used with:
A. TRAP
B. INTR
C. RST 7.5
D. RESET
Answer: B

35. TRAP is:
A. Maskable
B. Non-maskable
C. Software interrupt
D. DMA signal
Answer: B

---

36. RST 7.5 is:
A. Edge triggered
B. Level triggered
C. Software triggered
D. Reset triggered
Answer: A

37. RST 6.5 and RST 5.5 are:
A. Edge triggered
B. Level triggered
C. Clock triggered
D. Reset triggered
Answer: B

38. Address bus of 8085 is:
A. Multiplexed fully
B. Non-multiplexed
C. Partially multiplexed
D. Serial
Answer: C

39. Data bus size of 8085 is:
A. 4-bit
B. 8-bit
C. 16-bit
D. 32-bit
Answer: B

40. Which pin demultiplexes AD lines?
A. ALE
B. RD
C. WR
D. IO/M
Answer: A

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41. RESET IN clears:
A. Only accumulator
B. Only PC
C. PC and registers
D. Only flags
Answer: C

42. Interrupt pins allow:
A. DMA
B. External request
C. Reset
D. Clock
Answer: B

43. Number of interrupt pins in 8085:
A. 3
B. 4
C. 5
D. 6
Answer: C

44. Which is highest priority interrupt?
A. INTR
B. RST 7.5
C. TRAP
D. RST 5.5
Answer: C

45. Which group includes RD and WR?
A. Interrupt pins
B. Control pins
C. Power pins
D. Clock pins
Answer: B

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46. AD bus carries data when ALE is:
A. High
B. Low
C. Floating
D. Disabled
Answer: B

47. Which is output control signal?
A. READY
B. HOLD
C. RD
D. INTR
Answer: C

48. Clock frequency of 8085 is derived using:
A. X1, X2
B. AD pins
C. RESET
D. HOLD
Answer: A

49. IO/M = 1 indicates:
A. Memory operation
B. I/O operation
C. Reset
D. DMA
Answer: B

50. IO/M = 0 indicates:
A. I/O operation
B. Memory operation
C. Interrupt
D. DMA
Answer: B

---

Part 2 — 50 Fill in the Blanks (With Answers)

1. Intel 8085 has ______ pins.
Answer: 40

2. 8085 is a ______ bit microprocessor.
Answer: 8

3. AD0–AD7 are ______ lines.
Answer: multiplexed address/data

4. ALE stands for ______.
Answer: Address Latch Enable

5. Total address lines in 8085 are ______.
Answer: 16

6. A8–A15 are ______ lines.
Answer: address

7. RD is an active ______ signal.
Answer: low

8. WR is used for ______ operation.
Answer: write

9. IO/M distinguishes between memory and ______ operation.
Answer: I/O

10. READY signal inserts ______ states.
Answer: wait

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11. HOLD is used for ______ access.
Answer: DMA

12. HLDA means Hold ______.
Answer: Acknowledge

13. TRAP is a ______ interrupt.
Answer: non-maskable

14. INTR is a ______ interrupt.
Answer: maskable

15. SID stands for Serial ______ Data.
Answer: Input

---

16. SOD stands for Serial ______ Data.
Answer: Output

17. RESET IN is active ______.
Answer: high

18. RESET OUT resets ______ devices.
Answer: peripheral

19. CLK OUT provides ______ signal.
Answer: clock

20. X1 and X2 connect to ______.
Answer: crystal

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21. Maximum memory of 8085 is ______ KB.
Answer: 64

22. Vcc is ______ volts.
Answer: +5

23. Vss is ______.
Answer: ground

24. S1 and S0 are ______ signals.
Answer: status

25. INTA stands for Interrupt ______.
Answer: Acknowledge

---

26. AD bus carries address in ______ T-state.
Answer: first

27. ALE is ______ triggered.
Answer: high

28. Data bus width is ______ bits.
Answer: 8

29. Address bus width is ______ bits.
Answer: 16

30. Highest priority interrupt is ______.
Answer: TRAP

---

31. RST 7.5 is ______ triggered.
Answer: edge

32. RST 6.5 is ______ triggered.
Answer: level

33. Number of hardware interrupts = ______.
Answer: 5

34. RD and WR are ______ signals.
Answer: control

35. ALE is used to ______ address.
Answer: latch

---

36. HOLD request comes from ______ controller.
Answer: DMA

37. After HOLD, CPU sends ______.
Answer: HLDA

38. INTR requires ______ signal.
Answer: INTA

39. IO/M = 1 indicates ______ operation.
Answer: I/O

40. IO/M = 0 indicates ______ operation.
Answer: memory

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41. Pins AD0–AD7 reduce ______ count.
Answer: pin

42. 8085 uses ______ multiplexing.
Answer: address-data

43. Reset clears program ______.
Answer: counter

44. Clock is generated using ______ and ______ pins.
Answer: X1, X2

45. READY = 0 means device is ______.
Answer: not ready

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46. Control signals are mostly active ______.
Answer: low

47. Interrupt pins are ______ inputs.
Answer: external

48. Power pins are Vcc and ______.
Answer: Vss

49. Serial communication uses ______ and ______ pins.
Answer: SID, SOD

50. 8085 belongs to ______ bit processor family.
Answer: 8

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